We invite submissions of extended abstracts (1 page) describing original research, work-in-progress, and industrial case studies at the intersection of AI compilers, AI accelerators, and AI deployment. Topics include (but are not limited to):
Compilers for AI: partitioning, mapping, retargeting, IRs, and DSLs for heterogeneous systems (μC, DSP, NPU)
Compiler optimization for performance: memory hierarchy exploitation, offloading, asynchronous execution
Compiler optimization for efficiency: compression, pruning, quantization, neural architecture search, auto-tuning
Performance estimation: virtual prototyping, surrogate modeling, profiling
Code generation & hardware backends: embedded AI accelerators, RISC-V, and beyond-von-Neumann platforms
Submissions are limited to 1 page (extended abstract format), excluding references.
Important Dates
Submission deadline: Sunday, November 15, 2026 (AoE)
Notification of acceptance: Monday, December 8, 2026
Workshop day: January 18–20, 2027, Glasgow, UK